The present invention relates to an operational amplifier preferably used for controlling various apparatus.
Among conventional operational amplifiers, a CMOS (Complementary Metal Oxide Semiconductor) operational amplifier is generally known as constituting all of required transistors by P-channel MOS transistors and/or N-channel MOS transistors.
In general, the CMOS operational amplifier has an excellent operational speed (i.e., high through rate) due to the inherent characteristics of MOS transistors that can operate quickly with low power consumption.
However, using only MOS transistors for the transistors required in the operational amplifier, especially in its differential amplifying circuit, raises the following problem.
The withstanding voltage of MOS transistors is generally in a level of 10.about.20 V that is relatively lower compared with that of other transistors. If an excessive large voltage (e.g., a positive surge voltage) is applied to either an inverting input terminal or a non-inverting input terminal, an input MOS transistor connected to the inverting input terminal or the non-inverting input terminal will be damaged or the performance of this input MOS transistor will be deteriorated. In other words, it is impossible for the MOS transistors to provide a sufficiently high withstanding voltage for each input signal.
To solve this problem, namely to protect the MOS transistor from an excessively high voltage, it may be possible to interpose a diode or a Zener diode between gate and source terminals of the input MOS transistor as disclosed in Published Japanese patent application No. Kokai 50-115984. However, this increases the total number of circuit elements in the operational amplifier. Not only the cost will increase, but the manufacturing process will be complicated.